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Rugged VMEbus SBCs gain 2.6-based Linux dev kits
Nov. 30, 2004

TimeSys is shipping embedded Linux 2.6 Development Kits (LDKs) for two rugged VMEbus SBCs (single-board computers) from Curtis-Wright Controls Embedded Computing (CWCEC). The SBCs target military and aerospace applications such as tactical aircraft and armored vehicles with radar, sonar, and signal intelligence.

The new TimeSys LDKs support CWCEC's SVME/DMV-182, a dual-PowerPC board featuring two PMC sites, and the CHAMP-AV III, a quad-PowerPC DSP (digital signal processor) board.

The SVME/DMV-182

The SVME/DMV-182 is based on up to two 1GHz Motorola PowerPC 7457 or 700MHz 7455 processors, with 64KB of L1 cache, and 512KB of internal L2 cache. Additionally, each processor benefits from 2MB of off-chip L3 cache. The SVME/DMV-182 comes with 1GB of DDR SDRAM with ECC.


SVME/DMV-182's dual-processor architecture
(Click to enlarge)

The board also includes customizable backplane I/O, thanks to daughtercards that CWCEC calls "Interface Personality Modules" (IPMs, pictured at right). The company says IPMs allow backward pin compatibility with legacy PowerPC SBCs, or the creation of a new set of I/O.


SVME/DMV-182's I/O architecture
(Click to enlarge)


Additional features include:
  • AltiVec technology for fast floating point and vector processing operations
  • 128MB of contiguous, directly accessible high speed Flash
  • One 10/100, one 10/100/1000 (GbE) Ethernet ports
  • Two RS-232, four RS-422/485/232 serial ports
  • Single-ended 8 or 16-bit ultra SCSI-2 interface
  • Up to 16 bits of differential discrete digital I/O
  • Two USB 2.0 ports in a 32-bit, 33MHz PCI 2.2-compatible device
  • Two PCI-X-compatible PMC sites interfaced to other system elements via 64 pins of back panel I/O
  • Four on-board temperature sensors
CHAMP-AV III

The Champ-AV III is based on two or four Motorola PowerPC 7447 or 7447A processors clocked up to 1GHz, with AltiVec floating point/vector processing engines. The processors are connected by 100MHz PCI-X buses arranged in a "QuadFlow" architecture that CWCEC claims can deliver 3.2GB/sec of on-card, inter-processor bandwidth. An interface claimed to be capable of 2GB/sec of bandwidth connects each processor to its own 256MB bank of DDR SDRAM.


Champ-AV III processor architecture
(Click to enlarge)


Additional features include:
  • Dual 64-bit 100MHz PCI-X mezzanine modules (PMC-X)
  • Single 10/100 and dual 10/100/1000 Ethernet ports
  • Dual EIA-232/422 and single EIA-232 serial ports
  • 32-bit/33MHz; 64-bit/64MHz PMC
  • 64-bit/64MHz PCI
  • 32MB of on-board Flash


Champ-AV III's quad-processor architecture
(Click to enlarge)

TimeSys TimeStorm LDKs

TimeSys says its TimeStorm LDKs support programmers throughout the entire embedded Linux development process, from board bring-up to application development. It says its LDKs for the CWCEC boards include:
  • A hardware-optimized 2.6-based Linux kernel with advanced real-time capabilities, including schedulable hard and soft interrupt handlers, priority inheritance mutexes, and a preemptible kernel
  • Support for all external buses and interfaces, including kernel drivers for all on-board devices
  • Royalty-free, high-power runtime for commercial deployment
  • GNU toolchains to facilitate development and debugging of custom applications
  • Graphical Eclipse 3.0-based TimeStorm Linux Development Suite (LDS), for Linux application development on Windows or Linux hosts
CWCEC's president, Tom Quinly, said, "TimeStorm LDKs bring all of the software and utilities that programmers need for Linux deployment and application development on the SVME/DMV-182 and CHAMP-AV III. TimeStorm LDKs also deliver the integrated real-time functionality required by mission-critical, harsh-environment applications."

Availability

The SVME/DMV-182 and CHAMP-AV III are available in a range of environmental build grades. TimeSys LDKs for the boards are available now.

TimeSys also offers free 2.6- and 2.4-based Linux BSPs (board support packages) for some 90-plus hardware targets.



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