I/O module supports SDR, Linux

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Nov. 21, 2007

GE Fanuc Intelligent Platforms announced an 8-bit digital receiver I/O add-in card in a PMC/XMC module form factor. The ruggedized ICS-8551 supports harsh environments, and targets Linux-based systems running software-defined radio (SDR) applications, such as spectrum monitoring, signal intelligence, tactical communications, and radar.

The ICS=8551 combines GE Fanuc's analog-to-digital (ADC) circuitry with a Xilinx Virtex-4 FPGA (field-programmable gate array), which the company says enables VHF and UHF signals to be digitized and processed directly on the module. For example, developers can use the Hardware Development Kit (HDK) to create and execute algorithms such as digital down conversion (DDC), FFT (fast-Fourier transform), and filtering directly on the FPGA.

GE Fanuc's ICS-8551
(Click to enlarge)
The ICS-8551 HDK is equipped with both a default logic core and a DDC IP core, says GE Fanuc. The programmable default logic core is said to include an A/D interface and FIFO data buffering to both high-speed serial outputs and the PCI bus. The DDC core enables a band-limited signal to be shifted in frequency to baseband, then filtered and decimated.

Output options include PCI and high-speed serial outputs. GE Fanuc claims the ICS-8551 delivers up to eight lanes of high-speed serial I/O at rates of up to 3.125 GBytes/second, and its 64/66 PCI interface is said to offer sustained data rates of over 400 MBytes/second. The module communicates with XMC-equipped carrier cards such as the GE Fanuc's V4DSP front-end signal processor.

Overall, the module is said to offer I/O support for sampling frequencies of 1.5 GHz (four channel) or 3 GHz (two channel). Stated Jonathan Jones, sensor processing technology leader at GE Fanuc, "The ICS-8551 [pushes] back the boundaries of sampling frequency in the XMC format."

Some of the key specifications for the ICS-8551 are listed here:

4 AC-coupled analog inputs
Fs ≤ 1.5 GHz 4-channel, or 3 GHz 2-channel (software selectable), 8-bit
Xilinx Virtex-4 user programmable FPGA (FX60 or FX100)
TCXO @ 10 MHz
8-plug Samtec GRF1-J connector (ruggedization levels 1, 2 and 3)
8 individual MMCX coaxial connectors (ruggedization levels 4 and 5)
PCI 2.2 64-bit, 66 MHz master/target burst mode DMA capable
VITA 42 (XMC) high-speed serial interface (single connector, 8 lanes)
Pn4 LVDS or LVTTL signal levels
ANSI/VITA 20-2001 conduction-cooled PMC

Availability

ICS-8551 SDKs are available for Linux, VxWorks, and Windows. The SDKs include a kernel level driver, a flash loader, a full API, and example code written in C. No pricing or availability information was provided for the SDK or HDK.

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