| eCos ported to Xilinx Virtex-II Pro PowerPC FPGA |
Dec. 01, 2003
 Mind has ported eCos to Xilinx's Virtex-II Pro FPGA with embedded IBM PowerPC core, using Xilinx's ML300 Evaluation Platform as the target hardware. Mind says the port takes advantage of Xilinx's ML300 drivers for the 10/100 Ethernet MAC (EMAC) core, LCD controller, UART, IRQ controller, GPIO, and access to a microdrive through the Xilinx SystemACE controller, and additional eCos drivers are available from Mind for use on custom boards.
(Click for larger view of ML300 dev kit)
eCos is an open source, royalty-free embedded real-time operating system (RTOS) that offers hard real-time scheduling, TCP/IP networking, Flash file system support, and POSIX compatibility. Memory footprint can be as small as 50-300 KBytes, according to Mind. eCos is also the basis for the popular RedBoot bootloader.
Xilinx calls its ML300 development platform "ideal for implementing designs using PowerPC 405 processors, Rocket I/O transceivers, IP cores, and other high performance Virtex-II Pro FPGA features." The board also supports MontaVista Linux and Wind River's VxWorks. The development board functions are organized with the Virtex-II Pro device (2VP7) and primary components implemented on the CPU board, and the power and general purpose I/O implemented on the power-I/O board.
Features listed by Xilinx include:- Supports 2VP7-FF672
- 4 Gigabit Ethernet ports (serial transceiver)
- 2 Serial ATA connectors (serial transceiver)
- 2 HSSDC2 connectors (serial transceiver)
- 1 10/100 Ethernet port
- SystemACE CompactFlash interface, with 1GB IBM MicroDrive for FPGA Configuration, SW Apps, and file system
- 128MB DDR SDRAM
- 6.4-inch VGA TFT LCD, with integrated touch screen
- IEEE-1394 Support
- 32/33 PCI mezzanine card slot, with PMC Conn4
- 2x CardBus / PC Card PCMCIA slots
- High Speed CPU Trace & Debug ports
- AC97 Audio CODEC w 1W power amp
- IIC EEPROM, temperature sensors, digital potentiometers
- SPI EEPROM
- 2 PS2 ports, serial ports, and IEEE1284 parallel port
- Generous prototyping area:
- 9.6 Square inches
- 90 FPGA I/Os
"We are pleased to add Mind NV to our AllianceEmbedded Program," said Jerry Banks, director of Global Alliances at Xilinx. "The support that Mind is bringing to the open source eCos RTOS is welcomed as another viable option for the quickly expanding number of developers using the Virtex-II Pro family of FPGAs."
Mind supplies the source code of eCos (under a modified GPL license) and a tool chain for the development of eCos. As part of its service offering, Mind can adapt eCos for the production board on which the Virtex-II Pro device will be deployed and can deliver training and support in eCos kernel and application development, the company says.
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