| Renesas SuperH SH7751R 32-bit Superscalar SH4 microprocessor |
[Vendor: Renesas Technology Corp.]
The SH7751R is a true high-performance, higly integrated, cost effective, 2-way superscalar 32-bit RISC microprocessor based on one of the world's leading 32-/64-bit RISC architectures, the SuperH RISC CPU core. The SH7751R delivers best-in-class performance, on-chip integration and code size, with excellent low power consumption and is ideally suited for multimedia appliances, Car Information Systems and low-cost networking applications.
The SH7751R boast a 2-way superscalar architecture, full floating point engine, SIMD (Single Instruction Multiple Data) acceleration for 3D and DSP, 16-bit fixed instruction length for low memory footprint and an integrated PCI controller. With a frequency of 240MHz it provides a performance of 430MIPS/1.7Gflops. The 2-way set associative cache architecture reduces the cache miss and increases the real time capabilities. Operating at 1.5V, it has eight DMA channels (eight in total), supports a wide temperature range from -40*C to +85*C, and provides 16Kbytes instruction and 32Kbytes data cache memory.
The SH7751R supports the complete multimedia software stack which includes operating systems, JavaVM, browser, e-mail, OSGI, VoIP, H.323 suitable for
Java-based embedded applications, Internet appliances and Multimedia interactive TV. Other specific multimedia middleware such as speech recognition, text to speech, MP3 and MPEG-4 are also supported. The low-cost, high throughput, flexible PCI architecture of the device makes it suitable for low-end networking such as firewall, virtual private network (VPN) and residential gateways.
The SH7751R is supported by one of the widest ranges of operating systems including open source Linux.
Summary of features . . . - CPU
- SH4R 32-bit RISC 2-ways superscalar
- Operating frequency 240 MHz
- Processing performance -- 430 MIPS/1,7Gflops)
- 16-bit fixed instruction length for high code density
- Upward code compatibility with SH-1, SH-2, SH-3 series
- MMU, TLB for virtual memory management
- Floating-point Unit/DSP acceleration
- Single and double precision
- 3D Vector graphic Engine (128-bit vector registers)
- Hardware 4x4 matrix-calculation for multimedia accelerator (MPEG4, MP3)
- Memory
- On-chip cache, 16kbytes instruction and 32kbytes data
- Glueless interface for SDRAM, SRAM, Flash, ROM
- 8, 16, 32 or 64-bit data bus support
- 120MHz external bus
- PCI Bus
- 32-bit PCI bus controller (Rev 2.1)
- 33MHz (4 channels) / 66MHz (1 channel)
- Host/slave support
- On-chip PCI arbiter
- Dedicated 4-channel PCI DMA Controller
- On-chip FIFOs for fast data transfer
- Configurable as 32 I/O pins
- On-chip peripherals
- DMA Controller, 8 channels
- Timers, 5 channels -32-bits
- Watchdog timer
- Real-time clock
- PCMCIA control logic (2 channels)
- 2 Serial Communication Interfaces (SCI, SCIF)
- Interrupt Controller
- On-chip clock oscillator (with PLL)
- General purpose I/O 16 lines
- Power-down modes (sleep, standby, peripheral turn off)
- Package 256-QFP, 256-BGA
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